In a continuous-time delta-sigma modulator (CTDSM), a time difference between a quantizer and a feedback signal is called an excess loop delay (ELD). The ELD of the CTDSM has to be less than on sampling period, otherwise the quantization noise will increase and the CTDSM loop will become unstable. For example, if the ELD is designed to have a delay amount 0.5*Ts (Ts is the sampling period), the quantizer needs to make a decision within 0.5*Ts. Therefore, the decision time for bit cycling is restricted by the delay amount of the ELD, and the remaining time of the sampling period is wasted. Furthermore, because of the requirements of the wider bandwidth of the continuous-time delta-sigma modulator and the faster sampling rate, 0.5*Ts may not be enough for the bit(s) decision.